Digital Electronics Mcqs Start Creating PDF

MCQ: The inputs of a NAND gate are connected together. The resulting circuit is _______________?

1. OR gate
2. AND gate
3. NOT gate
4. None of the above

MCQ: The universal gate is ________________?

1. NAND gate
2. OR gate
3. AND gate
4. None of the above

MCQ: What would happen, if smaller logic modules are utilized for performing logical functions associated with FPGA? A. Propagation delay will increase B. FPGA area will increase C. Wastage of logic modules will not be prevented D. Number of interconnected paths in device will decrease ?

1. A & B
2. C & D
3. A & D
4. B & C

MCQ: Which type of CPLD packaging can provide maximum number of pins on the package due to small size of the pins ?

1. PLCC
2. QFP
3. PGA
4. BGA

MCQ: In Boolean algebra, the bar sign (-) indicates__________________?

1. OR operation
2. AND operation
3. NOT operation
4. None of the above

MCQ: What is/are the configurable functions of each and every IOBs connected around the FPGA device from the operational point of view ?

1. Input operation
2. Tristate output operation
3. Bi-directional I/O pin access
4. All of the above

MCQ: Which mechanism allocates the binary value to the states in order to reduce the cost of the combinational circuits ?

1. State Reduction
2. State Minimization
3. State Assignment
4. State Evaluation

MCQ: Digital circuit can be made by the repeated use of________________?

1. OR gates
2. NOT gates
3. NAND gates
4. None of the above

MCQ: When an input signal 1 is applied to a NOT gate, the output is ______________?

1. 0
2. 1
3. Either 0 & 1
4. None of the above

MCQ: The NAND gate is AND gate followed by_________________?

1. NOT gate
2. OR gate
3. AND gate
4. None of the above